Altera Quartus Software

Altera Corporation
Subsidiary of Intel
IndustryIntegrated circuits
Founded1983
HeadquartersSan Jose, California, United States
  • John Daane (CEO)
  • Dan McNamara (Intel PSG leader)
ProductsFPGAs, CPLDs, embedded processors, ASICs
RevenueUS$1.783 billion (2013)
US$584.1 million (2013)
US$556.8 million (2013)
Total assetsUS$4.658 billion (2013)
Total equityUS$3.333 billion (2013)
2,884 (December 2011)
ParentIntel
Websitewww.altera.com

Intel Quartus Prime is programmable logic device design software produced by Intel; prior to Intel's acquisition of Altera the tool was called Altera Quartus II.Quartus Prime enables analysis and synthesis of HDL designs, which enables the developer to compile their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the. A quick tutorial to demonstrate how to design your first project using Quartus II design software from Altera. This tutorial uses version 11.1 SP2 of the software, and using the Altera DE1 board.

ALTERA QUARTUS II PROGRAMMING GUIDE EE334 1. Boards (DE-1) and the Quartus II Software. The heart of the Altera DE-1 Development Board is the Field Programmable Gate Array (FPGA). The FPGA consists of thousands of clocked logic blocks and communication lines. Setting up a New Project in Altera Quartus II. This free software is a product of Altera Corporation. The common filenames for the program's installer are quartus.exe, quartuspgmw.exe or quartusstpw.exe etc. Quartus II Programmer lies within Development Tools, more precisely IDE.

Altera Corporation was a leading American manufacturer of programmable logic devices (PLDs, reconfigurable complex digital circuits), from 1984 through 2015.[1] Altera released its first PLD in 1984.[2]

Quartus

Altera and Intel announced on June 1, 2015 that they had agreed that Intel would acquire Altera in an all-cash transaction valued at approximately $16.7 billion.[3] As of December 28, 2015, the acquisition had been completed.[4][5]

The main product lines from Altera (now Intel) are the Stratix, Arria and Cyclone series FPGAs,[1] the MAX series CPLDs and non-volatile FPGAs,[1]Quartus design software,[6][7] and Enpirion PowerSoC DC-DC power solutions.

  • 1Products
  • 2Technology

Products[edit]

FPGAs[edit]

FPGA Developer-board with Altera Cyclone V SE FPGA

The Stratix series FPGAs are the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal-processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz.[8] Cyclone series FPGAs and SoC FPGAs are the company's lowest cost, lowest power FPGAs, with variants offering integrated transceivers up to 5 Gbit/s. In between these two device families are Arria series FPGAs, which provide a balance of performance, power, and cost for mid-range applications such as remote radio heads, video conferencing equipment, and wireline access equipment. Arria FPGAs have integrated transceivers up to 10 Gbit/s.[citation needed]

SoC FPGAs[edit]

Since December 2012, the company has been shipping SoC FPGA devices.[9] According to Altera, fully depleted silicon on insulator (FDSOI) chip manufacturing process is beneficial for FPGAs.[10] These devices integrate FPGAs with full hard processor systems based around ARM processors onto a single device.

PowerSoC[edit]

In May 2013, Altera acquired embedded power chipmaker Enpirion for $134m in cash ($141m including the assumption of debt). Since that time, Enpirion has been incorporated into Altera by becoming its own product offering within the Altera portfolio of products. The Enpirion products are power system-on-a-chip DC-DC converters that enable greater power densities and lower noise performance compared with their discrete equivalent.[citation needed] Unlike converters made from discrete components Enpirion dc-dc converters are simulated, characterized, validated and production qualified at delivery.[11]

ASICs[edit]

Previously Altera offered a publicly available ASIC design flow based on HardCopy ASICs, which transitioned an FPGA design, once finalized, to a form which is not alterable. This design flow reduced design security risks as well as costs for higher volume production. Design engineers could prototype their designs in Stratix series FPGAs, and then migrate these designs to HardCopy ASICs when they were ready for volume production.

The unique design flow makes hardware/software co-design and co-verification possible. The flow has been benchmarked to deliver systems to market 9 to 12 months faster, on average, than with standard-cell solutions. Design engineers can employ a single RTL, set of intellectual property (IP) cores, and Quartus II design software for both FPGA and ASIC implementations. Altera's HardCopy Design Center manages test insertion.[12]

IP cores[edit]

Altera and its partners offer an array of intellectual property (IP) cores that serve as building blocks that design engineers can drop into their system designs to perform specific functions. IP cores eliminate some of the time-consuming tasks of creating every block in a design from scratch.

Altera offers an embedded portfolio with a broad selection of soft processor cores:

  • Nios II embedded processor
  • Freescale ColdFire v1 core (free for Cyclone III FPGA).
  • ARM Cortex-M1 processor

And one hard IP processor core:

  • ARM Cortex-A9 processor

Design software[edit]

All of Altera's devices are supported by a common design environment, Quartus II design software. Quartus II software is available in a subscription-based edition and a free Web-based edition. It includes a number of tools to foster productivity.

Technology[edit]

40-nm technology[edit]

In May 2008, Altera introduced the industry's first 40-nm programmable logic devices: the Stratix IV FPGAs and HardCopy IV ASICs.[13] Both devices are available with integrated transceiver options. Since then, the company has also introduced Stratix IV GT FPGAs, which have 11.3 Gbit/s transceivers for 40G/100G applications,[14] and Arria II GX FPGAs, which have 3.75 Gbit/s transceivers for power- and cost-sensitive applications.

Semiconductors manufactured on a 40-nm process node address many of the industry's key challenges, including power consumption, device performance, and cost. Altera's devices are manufactured using techniques such as 193-nm immersion lithography and technologies such as extreme low-k dielectrics and strained silicon. These techniques and technologies bring enhancements to device performance and power efficiency.

28-nm technology[edit]

In April 2010, Altera introduced the FPGA industry's second 28-nm device, the Stratix V FPGA (to Xilinx's Kintex-7 FPGA), available with transceivers at speeds up to 28 Gbit/s. This device family has more than 1 million logic elements, up to 53 Mb of embedded memory, up to 7 x72 DDR3 DIMMs at 800 MHz, 1.6 Gbit/s LVDS performance, and up to 3,680 variable-precision DSP blocks. In August 2011, Altera began shipping 28-nm Stratix V GT devices featuring 28-gigabits-per-second transceivers.[15]

The devices also feature some unique features. Embedded HardCopy blocks harden standard or logic-intensive applications, increasing integration and delivering twice the density without a cost or power penalty. Altera has developed a user friendly method for partial reconfiguration, so core functionality can be changed easily and on the fly. And there is a path to HardCopy V ASICs, when designs are ready for volume production. Also, Altera’s 28 nm FPGAs aim to reduce power requirements to 200 mW per channel.[15]

In December 2012, the company announced the shipment of its first 28 nm Cyclone V SoC devices, which have a dual-core ARM Cortex-A9 processor system with FPGA logic on a single chip.[16][17] The new SoCs are targeted for wireless communications, industrial, video surveillance, automotive and medical equipment markets.[16][17] With these SoCs devices, users are able to create custom field-programmable SoC variants for power, board space, performance and cost optimization.[16][17]

14-nm technology[edit]

In February 2013, Altera announced an agreement with Intel to use Intel’s foundry services to produce its 14-nm node for the future manufacturing of its FPGAs, based on Intel’s 14 nm tri-gate transistor technology, in place of Altera’s ongoing agreement with Taiwan Semiconductor Manufacturing Corporation (TSMC).[18]

In October 2016, nearly one year after Intel's integration with Altera, STRATIX 10 was announced, which is based on Intel's 14 nm Tri-Gate process.[19]

Competition[edit]

Altera's largest competitor is FPGA founder and market-share leader Xilinx.[20][21]

The next closest competitors are Lattice Semiconductor and Actel (now Microsemi), each representing less than 10 percent of the market.[20]

FPGA startup company Achronix is also a competitor but does not have any significant market share.

In broader terms, Altera competes with ASIC, structured ASIC, Metal Configurable Standard Cell (MCSC) like BaySand and Zero Mask-Charge ASIC companies like eASIC.

Specifically in ASIC, BaySand has introduced metal configurable FPGA (mcFPGA) products to fill the needs due to discontinued HardCopy from Altera.

Restatement[edit]

On June 21, 2006, Altera Corp. restated its 1996-2005 financial results to correct accounting errors related to stock-based compensation expense. Altera's CFO resigned after an SEC investigation revealed the decade of misstated earning reports resulted from the company's alleged culture of backdating stock options.[22]

Acquisition by Intel[edit]

On June 1, 2015, Altera and Intel announced that Intel would acquire Altera in an all-cash transaction valued at approximately £15.73 billion ($16.7 billion).[18] As of December 28, 2015, the acquisition has been completed.[3][4][5]

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References[edit]

  1. ^ abcZacks Equity Research, NASDAQ. 'Altera Shipping 28-nm FPGAs.' April 13, 2012. Retrieved May 8, 2012.
  2. ^'Key Companies Shake Up This Year's Top Employers'. Electronic Design. Archived from the original on January 16, 2013.Italic or bold markup not allowed in: |work= (help)
  3. ^ ab'Intel to buy Altera for $16.7B as chipmakers consolidate'. CNET. June 1, 2015. Retrieved June 1, 2015.
  4. ^ abClark, Don (December 28, 2015). 'Intel Completes Acquisition of Altera'. The Wall Street Journal. Retrieved December 28, 2015.(subscription required)
  5. ^ abBurt, Jeffrey (December 28, 2015). 'Intel Completes $16.7 Billion Altera Deal'. eWeek. Retrieved December 29, 2015.
  6. ^Clive Maxfield, 'Altera's Quartus II design software features Qsys System Integration Tool', EETimes, May 9, 2011. Retrieved June 6, 2012.
  7. ^Clive Maxfield, 'Latest and greatest Quartus II design software from Altera', EETimes, November 7, 2011. Retrieved June 6, 2012.
  8. ^Graham Pitcher, 'Altera set to bring ‘big performance boosts’ to fpga users', New Electronics, June 10, 2013. Retrieved June 25, 2013.
  9. ^Clive Maxfield, 'Altera's shipping its first SoC FPGAs', EE Times, December 12, 2012. Retrieved January 9, 2013.
  10. ^Peter Clarke, 'Altera eyes FDSOI process for FPGAs', EE Times, December 15, 2012. Retrieved January 9, 2013.
  11. ^'Altera to buy Enpirion for on-chip power conversion'. EE Times. May 14, 2013. Retrieved August 29, 2014.
  12. ^Altera Product Catalog, January 2009
  13. ^Mark LaPedus, 'Analyst comments on Altera's 40-nm FPGAs', EETimes, May 19, 2008. Retrieved January 14, 2013.
  14. ^'Introducing Stratix IV GT FPGAs: The only FPGAs with Integrated 11.3-Gbps Transceivers'. April 21, 2015. Retrieved June 2, 2015.
  15. ^ ab'Altera ships Stratix V GT FPGAs', EETimes, August 24, 2011. Retrieved November 18, 2011.
  16. ^ abcToni McConnel, Embedded. 'Altera ships its first Cyclone V SoC devices.' December 12, 2012. Retrieved January 3, 2013.
  17. ^ abc'Altera, ARM roll out FPGA-adaptive embedded software toolkit', EET Asia, December 21, 2012. Retrieved January 3, 2013.
  18. ^ abMark LaPedus, 'Intel-Altera deal to shake up foundry landscape', Chip Design Magazine, February 26, 2013. Retrieved June 3, 2013.
  19. ^By Joel Hruska, ExtremeTech. “Intel launches Stratix 10: Altera FPGA combined with ARM CPU, 14nm manufacturing.” October 10, 2016. Retrieved December 6, 2016.
  20. ^ abJohn Edwards, “No room for Second Place”, EDN, June 1, 2006. Retrieved January 15, 2009.
  21. ^Jim Turley, 'The Future Belongs to Programmers', EE Journal, January 2, 2012. Retrieved January 14, 2013.
  22. ^'Altera to restate financial results'.

External links[edit]

Retrieved from 'https://en.wikipedia.org/w/index.php?title=Altera&oldid=915833296'

Description

Altera Quartus Prime software or recently Intel Quartus Prime provides everything you need to design with Altera PLDs, including FPGAs, SoCs, and CPLDs. It’s a complete development package that comes with a user-friendly graphical user interface and better technology that helps you make your ideas more realistic. Altera Quartus Prime software is available in three versions based on design requirements: Pro, Standard, and Lite Edition

Features of Altera Quartus Prime

  • Qsys is the next generation of system integration tools. This tool saves considerable time and effort in the FPGA design process.
  • Powerplay Power Analyzer: The ability to estimate consumption from the concept of initial design through the implementation of the design
  • System Console: A system-level debug tool that helps you quickly debug FPGA designs in real-time.
  • Synthesis: A new synthesis engine, which integrates a new language parser into the software. With this parser, designers can see the improved RTL language.
  • An external memory interface device used to identify calibration and margin issues for each DQS signal.
  • DSP Builder: A tool to connect seamlessly between MATLAB / Simulink and Quartus II software
  • SoCEDS: A collection of development tools, useful programs for software development of the SoC FPGA system
  • Performance evaluation of high speed sequences
  • For full details on Altera Quartus Prime Here visit.
Altera Quartus Prime Tips:
  • Version 16 of this software is available in three versions, with two versions of Standard and Pro. Comparison of editing options is visible here.

Required system

Windows System requirements

  • OS: Windows 7, 8.1, 10 (64 bit)
  • Minimum Disk Space: 33 GB
  • Recommended Physical RAM: 512 MB – 8 GB (depends on the family of chips)
  • Description : Development environment for FPGA, CPLD firm Intel.

Linux System requirements

Altera Quartus Ii Software

  • OS: Linux 64 bit
  • Minimum Disk Space: 33 GB
  • Recommended Physical RAM: 512 MB – 8 GB (depends on the family of chips)
  • Description : Development environment for FPGA, CPLD firm Intel.

Pictures

Installation guide

Readme.txt file.

Altera Quartus Software Download

The link for downloading components is included in the Component Links file.

Download

File NameSizeLinkBackup link
Intel Quartus Prime Standard Edition 18.1 v18.1.0.625 x642.19 GBPart1
Part2
Part1
Part2
Intel Quartus Prime Professional Edition 18.1 v18.1.0.222 x642.38 GBPart1
Part2
Part1
Part2
Intel Quartus Prime Standard Edition 18.1 v18.1.0.625 Linux642.76 GBPart1
Part2
Part1
Part2
Intel Quartus Prime Professional Edition 18.1 v18.1.0.222 Linux643.23 GBPart1
Part2
Part1
Part2

Altera Quartus Ii

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